Upcoming Challenge for the 1st Year of AIoT
This article will start with a comprehensive smart vehicle management solution equipped with AI image analysis technology and introduce representative successful cases of smart vehicle…
Tech-Paper
Emulation – A job management strategy to maximize use
Increased design complexity, protocols, embedded software, power and verification at the system level all drive the need for the kind of performance, capacity, and “shift-left” methodology that…
Veloce Primo completes a full SoC verification landscape
SoC design teams are tasked with completing full system-level verification. That means thoroughly vetting all hardware blocks, all interactions between those blocks and the purpose-built…
Market dynamics drive need for hardware emulation
When the Veloce Strato platform came to market in 2017, there was an implicit promise in the roadmap: deliver greater capacity and usability while preserving the investment…
Siemens, AMD, and Microsoft collaborate on EDA in the cloud
Moving some or all of your EDA computing to the cloud enables your company to reduce time-to-market and innovate faster by taking advantage of flexible resources and…
New approaches to physical verification closure and cloud computing come to the rescue in the EUV era
Time-to-market is a critical commodity in the electronics industry, as is the cost-effective use of resources and engineer expertise. EDA suppliers constantly evaluate design information…
EDA in the cloud—Now more than ever
What is the value of cloud computing to my company? Learn how and why the cloud became a viable option for IC verification, understand the…
Calibre in the Cloud: Unlocking massive scaling and cost efficiencies
As companies look to leverage cloud capacity for faster turnaround times on advanced process node designs, they can be confident that running Calibre in the cloud…
Improving the reliability and performance of RF ICs with advanced EDA technology
RF circuits are very sensitive to parasitic elements and layout-dependent effects, so both pre-and post-layout simulations are essential to ensuring a robust circuit that performs…
Modeling ECD with machine learning for CMP simulation
Accurate modeling of post-ECD surface topography variation is crucial for correct CMP simulation. Siemens and the American University of Armenia collaborated to investigate and evaluate…