Electrical rule checking (ERC) is an important part of design verification for any integrated circuit (IC) or chip design. ERC verifies the robustness of a schematic or layout design from the perspective of electrical engineering, ensuring that circuits will operate as designed and intended. ERC violations can result in reduced yield, or worse, potential circuit malfunction or electrical failure after product delivery. Finding and correcting ERC errors is critical to product success.
In this paper, read about an EDA tool with the ability to combine electrical and physical attributes to provide advanced automated circuit verification for electrostatic discharge (ESD), electrical overstress (EOS), multiple power domains, advanced ERC, and other reliability concerns.